Analog Layout Design Engineer

Post Date: 02 Dec 09

QUALIFICATION (DETAIL):

Education:

Bachelor degree in Semiconductor, Electronics Engineering,2+ years of analog layout experience.

Experience:

1:Familiar with Virtuoso,layout XL,composer,Calibre.

2:Solid fundamental knowledge in layout, such as matching, floor plan, size estimation.

3:Experience in analog layout: bandgap,pll,LDO,ADC,DAC etc.

4:It will be helpful to be familer with perl and CAD.

DESCRIPTION OF FUNCTION & RESPONSIBILITY:

1:build standcell and IO PAD library.

2:layout analog block and clean DRC/LVS independently, some block need modify netlist manually.

SPECIAL REQUIREMENTS:

Teamwork, flexibility & initiative; Good communication with analog designer and APR team.

Location: Shanghai (China)

Please send full resume to Raymond.wu@atheros.com